B&B Electronics PC Watchdog Timer Card ATRWDT Instrukcja Użytkownika Pobierz pdf (Strona 24)

P104-WDG-CSM User Manual

Reading and Loading the Counters

If you attempt to read the counters on the fly when there is a high frequency input, you will

most likely get erroneous data. This is partly caused by "carries" rippling through the counter

during the read operation. Also, the low and high bytes are read sequentially rather than

simultaneously and, thus, it's possible that "carries" will be propagated from the low byte to the

high byte during the read cycle.

To circumvent this, you can perform a counter-latch operation in advance of the read cycle. To

do this, load the RW0 and RW1 bits with zeroes. This instantly latches the count of the

selected counter in a 16-bit hold register. (An alternative method of latching counters that has

an additional advantage of operating simultaneously on several counters is by use of a

readback command to be discussed later.) A subsequent read operation on the selected

counter returns the held value. Latching is the best way to read a counter on the fly without

disturbing the counting process. You can only rely on directly read counter data if the counting

process is suspended while reading, by bringing the gate low, or by halting the input pulses.

You must specify in advance the type of read or write operation that you intend to perform for

each counter. You have a choice of loading/reading (a) the high byte of the count, (b) the low

byte of the count, or (c) the high byte followed by the low byte. This last is of the most general

use and is selected for each counter by setting the RW0 and RW1 bits to ones. Of course,

subsequent read/load operations must be performed in pairs in this sequence or the

sequencing flip-flop in the 8254 chip will get out of step.

The readback command byte format is:

1 1 CNT STA C2 C1 C0 0

CNT: When is 0, latches the counters selected by bits C0-C2.

STA: When is 0, returns the status byte of counters selected by C0-C2

C0,C1,C2: When high, select a particular counter for readback. C0 selects Counter

0, C1 selects counter 1, and C2 selects counter 2.

You can perform two types of readback operations with the readback command. When

CNR=0, the counters selected by C0-C2 are latched simultaneously. When STA=0, the

counter status byte is read when the counter I/O location is accessed. The counter status byte

provides information about the current output state of the selected counter and its

configuration. The status byte returned if STA=0 is:

B7 B6 B5 B4 B3 B2 B1 B0

OUT NC RW1 RW2 M2 M1 M0 BCD

1 2 ... 19 20 21 22 23 24 25 26

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B&B Electronics PC Watchdog Timer Card ATRWDT Instrukcja Użytkownika Strona 24